IIT Hyderabad researchers develop low power chips for artificial intelligence devices

By Anurag Mallick  Published on  22 Oct 2019 12:04 PM GMT
IIT Hyderabad researchers develop low power chips for artificial intelligence devices

Hyderabad: IIT Hyderabad researchers have developed low-power chips that can be used in artificial intelligence-powered devices. They have developed a magnetic quantum-dot cellular automata (MQCA) based nanomagnetic logic architectural design methodology of approximate arithmetic circuits.

The research was undertaken by a team comprising Santosh Sivasubramani (PhD scholar, Advanced Embedded Systems and IC Design Laboratory, Department of Electrical Engineering, IIT Hyderabad), Dr Amit Acharyya (Associate Professor, Department of Electrical Engineering, IIT Hyderabad), and Dr Chandrajit Pal (Post-Doctoral Research Fellow, IIT Hyderabad). The researchers are working towards a vision of realising resource-constrained magnetic chips for ultra-low-power portable artificial intelligent applications.

Many modern systems such as speech and face recognition systems and IoT-enabled devices for remote health monitoring require highly computationally and energy-intensive neural networks. Hence, it is not practically affordable to perform these computations in portable hand-held devices.

These factors put forth an apparent demand for low-power chip design in the area of artificial intelligence. To address these issues, highly intensive convolutions should be performed using ultra low power, least energy-consuming, and area-efficient devices, thus motivated them to explore the MQCA-based nanomagnetic architecture designs for next-generation rebooting computing platform.

Speaking about the outcomes and benefits of this research, Dr Acharyya said, “We have computationally modelled, designed and implemented an arithmetic adder, subtractor and add/sub using nanomagnets, which are the basic building blocks of performing AI computing. We are aware that the emerging computing devices are handy in size as well as requiring low-power computation and are tolerant to feeble decrease in precision.” Their work targets such devices, where there is significant research towards making it low power without compromising on accuracy.

Speaking about this research, Santosh Sivasubramani said, “The proposed design methodology of performing approximate arithmetic computation using nanomagnets yields 50-80% reduction in the number of nanomagnets. IT also clock cycles without much degradation in accuracy leading to area and energy efficiency in comparison to the traditional implementation of accurate nanomagnetic logic design. We achieved a 1-bit approximate adder-subtractor implementation using only four individual nanomagnets that offer supremacy over existing designs contributing towards rebooting computing. With these becoming successful, we now aim for a bigger goal by porting some power-hungry AI applications on such indigenously developed ultra-low-power computing platform.”

On the contrary, the emerging next-generation electronic devices using ‘dipole coupled nanomagnets’ for computing and information propagation requires no standby power to maintain its ‘logic states’ required for computing information, thus making it volatile.

The research has also been published in the reputed peer-reviewed journal by Nanotechnology.

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