India’s semiconductor ecosystem receives boost; OU, CBIT design prototype of ADPLL ASIC chip

The project was undertaken under the Government of India’s Chips to Startup (C2S) programme.

The chip was built using 180 nm CMOS technology and fabricated at the Semiconductor Laboratory (SCL) in Mohali, one of the country’s leading research and production facilities for microelectronics.

Chip Unveiled at OU Campus

OU Vice Chancellor Prof. Kumar Molugaram formally unveiled the prototype chip at a campus event held on Friday. The event was attended by members of the Academic Council, university officials, and senior faculty members, including Prof. P. Chandra Sekhar, Principal of the University College of Engineering (UCE), and Prof. A. Krishnaiah, Dean of the Faculty of Engineering.

Prof. Molugaram commended the efforts of the project team for not only completing the chip design and fabrication successfully but also for securing a ₹5 crore research grant to advance semiconductor research at the university. “This is a meaningful contribution to the country’s semiconductor ambitions and strengthens the academic-industry ecosystem for chip design and innovation,” he said.

Centre of Excellence in AI and ICs Established

The project team, led by Prof. P. Chandra Sekhar, has also established a Centre of Excellence in Artificial Intelligence and Integrated Circuits (CIIC) at Osmania University. The Centre aims to nurture semiconductor design capabilities in academic institutions and train students in cutting-edge areas like digital IC design and AI hardware.

“We are grateful to the Ministry of Electronics and Information Technology (MeitY) and CDAC for their continuous support,” said Prof. Sekhar. “Access to high-end Electronic Design Automation (EDA) tools like Cadence and Synopsys, along with the opportunity to fabricate our designs at SCL, has been critical to the success of this project.”

Applications and Future Scope

The ADPLL chip is designed to deliver high-speed digital synchronization capabilities, making it suitable for a range of advanced electronics applications. It is expected to be useful in communication systems, digital signal processing, and emerging AI hardware platforms.

The success of this project represents a step forward in building a self-reliant semiconductor design ecosystem in India, particularly within academic institutions. It also aligns with the national strategy to reduce dependence on imported semiconductor technologies by strengthening indigenous research and development efforts.

About the C2S Programme

The Chips to Startup (C2S) programme, launched by MeitY, supports start-ups, academia, and research institutions in chip design and fabrication. The initiative aims to create a pipeline of skilled semiconductor professionals and build foundational capabilities across the country.